ECE 5/404 PLL and High-Speed Link Design: Lecture Notes for Fall 2016
Aug 22: lec1_ece504.pdf Course introduction. Start PLLs: Applications. Negative feedback system review: negative feedback amplifier.
Aug 24: lec2_ece504.pdf Negative feedback loop for frequency multiplication, phase and instantaneous frequency concepts.
Aug 29: lec3_ece504.pdf Phase detector - XOR, characteristics, linear range. Start phase frequency detector (PFD).
Aug 31: lec4_ece504.pdf Finish PFD, Type-I PLL, PFD periodic noise, PFD circuit implementation.
Sep 5: Labor Day
Sep 7: lec5_ece504.pdf Periodic disturbance due to PFD, Type-II PLL.
Sep 12: lec6_ece504.pdf Type-I PLL - issues. Review of negative
feedback loop gain, unity-gain frequency, first-order system.
Sep 14: lec7_ece504.pdf
Start Type-II PLL: Charge-pump PLL topology, feedforward zero,
derivation of Kpd,I and Kpd
Sep 19: lec8_ece504.pdf
Charge-pump PLL contd.: Derivation of ωu,loop,
reference feed-through rejection, 3rd order
PLL.
Sep 21:
lec9_ece504.pdf A quick PLL design,
design methodology for a Type-II 3rd order
PLL ( 3rd-order PLL equations). Start charge pump design
issues.
Sep 26: lec10_ece504.pdf
Charge Pump design techniques:
charge-injection, clock feed-through. Current steering CP
design, replica biasing, professional charge pump.
Sep 28: lec11_ece504.pdf Charge pump
non-idealities and their mitigation: Dead zone, current mismatch, charge
sharing.
Oct 3: lec12_ece504.pdf Charge pump
non-idealities contd: Dead zone, current mismatch,
charge sharing.
Oct 5: lec13_ece504.pdf CP conclusion. PFD
circuit implementation.
Oct 10: lec14_ece504.pdf Oscillators basics.
Oct 12: lec15_ece504.pdf
Ring Oscillators. VCOs.
Oct 17: lec16_ece504.pdf
VCOs: Tuning linearity, tuning
schemes, Delay cells: replica biasing
Oct 19:
lec17_ece504.pdf Power supply sensitivity, improved linearity and symmetric delay
loads, Large swing VCOs, Supply regulated VCOs. Voltage Controlled
Oscillators
Oct 24: lec18_ece504.pdf
Conclude VCOs, Phase Noise in
Oscillators.
Oct 26: lec19_ece504.pdf
Sample midterm review.
Oct 31 (Monday): Midterm Exam. Closed book, closed notes and computer. One page (A4 size, both sides) cheat-sheet allowed. Bring your calculators. Sample Exam.
Nov 2: lec20_ece504.pdf Oscillator Phase Noise. (VCO Simulation using PSS Analysis). Start PLL Noise Analysis, PLL Noise Analysis.zip.
Nov 8: lec21_ece504.pdf PLL Noise Analysis. Simulating PLL Jitter.
Nov 10: lec22_ece504.pdf
Split-tuned PLLs: analysis.
Jitter accumulation in VCO/PLL/VCDL.
Nov 14: lec23_ece504.pdf
DLL: VCDL, false locking, stuck
at min/max delay, PFD issues, Phase-only detectors, MDLLs. DLL Lecture Slides..
Nov 16: lec24_ece504.pdf
Start Clock and Data Recovery
(CDR). TSPC Clock Dividers
Nov
21-25: Thanksgiving break from instruction!
Midterm Take-home: Due Nov 28, 2016: Midterm F16.pdf
Nov 28: lec25_ece504.pdf
CDR contd.: Modified Hogge PDs, Bang-Bang PD. Single-loop CDRs
Nov 30: lec26_ece504.pdf
Conclude single-loop CDRs. Dual Loop CDRs: Phase
selection architectures, phase interpolators.
Dec 5: lec27_ece504.pdf Dual-loop CDRs examples. Phase Interpolators.
Dec 7: lec28_ece504.pdf Clock Synthesizers/Divider: TSPC, Integer-N and Fractional-N. Course conclusion.
Final Exam. Take home exam. Exam is due on Dec 14, 11:59 PM: Final F16.pdf
MATLAB Files
The cumulative MATLAB files archive developed during the
course is here.