ECE 5/411 CMOS Analog IC
Design: Assignments and Projects information for Spring
2013
Homework Assignments
HW 1– due Tuesday, Feb 5: HW1.pdf
HW 2– due Tuesday, Feb
12: HW2.pdf, 1Gb DDR3 SDRAM Datasheet
HW 3– due Tuesday, Feb
19: HW3.pdf (Help:
SRAM Characterization slides,
Matlab code)
HW 4– due Tuesday, Feb
26: HW4.pdf, HW4 Prob2-4 Solution
HW 5– due Tuesday, Mar
5: HW5.pdf (Help:
Getting started with VerilogA Modeling)
HW 6– due Tuesday, Mar
11: HW6.pdf (Help:
Matlab code for Stability
Analysis)
HW 7– due Tuesday, Mar
18: HW7.pdf
Design Projects
Project#1: PLL Design with a fixed
clock divider ratio. (Grades
Rubric)
Apr 2: Progress report due (10% grade)
Apr 1116: Project#1 final report due.
Project#2: Select Design projects
May 7: Project#2 progress report due (10% grade)
May 14: Project#2 Final report due.