Cadence Tutorials for ECE445
Some of the following tutorials have been adapted from CMOSedu tutorials to match the Cadence environment settings provided for ECE445 class.
Tutorial 1 –
Schematic, layout and simulation of a resistive voltage divider.
Tutorial 2 –
N-well layout, DRC and layout features in Cadence Virtuoso.
Tutorial 3 –
Resistor, Capacitor and MOSFET layout in Cadence Virtuoso.
Cadence tutorials
from CMOSedu
· Tutorial 2 – Layout and simulating the IV curves of PMOS and NMOS devices – cadence_tutorial_2_video.mp4 (56:40)
·
Tutorial
3 – Design, layout, and simulation of a CMOS inverter – cadence_tutorial_3_video.mp4 (27:17)
·
Tutorial
4 – Design, layout, and simulation of a CMOS NAND gate – cadence_tutorial_4_video.mp4 (25:03)
·
Tutorial
5 – Design, layout, and simulation of a ring oscillator – cadence_tutorial_5_video.mp4 (25:23)
·
Tutorial
6 – Placing circuit layouts in a padframe for
fabrication – cadence_tutorial_6_video.mp4 (71:47)