ECE 615 Mixed Signal IC Design

Fall 2013Boise State University

Previous year’s course page is here: s10 (Delta-Sigma ADC Design)

 

Instructor       : Vishal Saxena

Time               : Tuesday and Thursday, 4:30 to 5:45 PM

Course dates  : Tuesday, August 27 to Thursday, Dec 12

Location         : MEC 309

Office Hours  : TBA

Holidays         : November 26 & 28, Thanksgiving break from instruction.

 

Lecture notes and accompanying material are here.

Assignments and projects can be found here.

Current grades are here.

MATLAB examples are posted here.


Course content – Data Conversion and spectral estimation fundamentals, Delta-Sigma modulator (DSM) architectures, decimation filters, discrete-time (switched-capacitor) as well continuous-time (CT) DSM design, Cascaded DSMs, Bandpass and Complex DSMs, Flash ADCs and DACs employed in the DSMs, DAC mismatch error shaping, effects of excess-loop delay and clock jitter in CT-DSMs, tuning techniques for CT-DSMs.

 

Prerequisites – Background in Analog IC Design (ECE 511) and Digital Signal Processing. Basic knowledge of circuit simulation using Spice/Spectre and Matlab scripting.

                          For Switched-Capacitor and fully-differential circuits refer to advanced Analog IC Design (ECE 614).                                                                                                                                       

 

Textbook – Understanding Delta-Sigma Converters – Richard Schreier and Gabor Temes, Wiley-IEEE Press, 2005.

The course will require the use of Matlab Delta-Sigma Toolbox by R. Schreier available for download online. The toolbox manual is here with a single page summary.

The complete reference list for delta-sigma modulators is available here.

 

Workload (Grading) 

·         Homeworks (25%): Weekly assignments incorporating Matlab as well as Spectre based design and simulation.

·         Mid-Term Exam (25%)

·         Project 1 (25%): Discrete-time delta-sigma modulator design.

·         Project 2 (25%): Continuous-time delta-sigma modulator design.

 

Policies

·         Use of laptop in the class is encouraged for simulations while internet surfing is not.

·         Late work will not be accepted.

·         While collaboration in homeworks and projects is encouraged but blatantly copying stuff (plagiarism) is not allowed.

·         Cheating or plagiarism will result in an automatic F grade in the course (so do your own homework and projects!). Students should review Section 18/18A/18B of the Boise State University Student Code of Conduct (http://www.boisestate.edu/policy/policy_docs/2020_studentcodeofconduct.pdf) for more detailed information regarding academic dishonesty.

 

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