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D/H'""/"/"/(  *  " $)667723"2$'f#ω n{VR2$D!Vvب/Rr$߿ߝXoifDr$g\Oy Eki$$"$9׋ 9  "$_Fʵuϓ՛vM "$iӿG)@ AA1))?@8^_Sg4dddd 0hppp@  <4KdKd l 0T0ʚ;ʚ;<4!d!d l 0 <4dddd l 0 0___PPT10 ___PPT9rnu=!BWk@~PNG  IHDRF} PLTE3:tRNS@f cmPPJCmp0712Om9IDATc``b $<&40(Zжj˂AtM iIENDB`/ 0|G;,=P2467`?@.A9Hd8>BCDE?Z+ F\course\cpeg323-05F\Topic3a-323.pptO =TM' Reading List (WSlides: Topic2a Henn & Patt: Chapter 2 Other papers as assigned in class or homeworks 4W " W>1 ;< Registers (32 regs with R0 = 0 Reserved registers : R1, R26, R27. Special usage: R28: pointer to global area R29: stack pointer R30: frame pointer R31: return address F " W    GStandard Register Conventions(P(The 32 integer registers in the MIPS are  general-purpose  any can be used as an operand or result of an arithmetic op But making different pieces of software work together is easier if certain conventions are followed concerning which registers are to be used for what purposes. These conventions are usually suggested by the vendor and supported by the compilersfy " x " ( " x " (U " xqH Register Conventions in the MIPS(!P ( =>MIPS Operations(!Load/Store ALU ops Branches/Jumps" " x":MIPS Instruction Formats(P(;Fields in MIPS Instructions(P(op: Specifies the operation; tells which format to use rs: First source register rt: second source register (or dest. For load) rd: Destination register shamt: Shift amount (described later) funct: Further elaboration on opcode address: immediate constant, displacement, or branch target  " x5-! 5t7%!=? Here is the meaning of each name of the fields in MIPS instructions: op: operation of the instruction rs: the first register source operand rt: the second register source operand rd: the register destination operand; it gets the result of the operation shamt: shift amount funct: function; this field selects the variant of the operation in the op fieldE0P< " C &,NTPj&}T@ALU ops(lR-type: ADD R1,R2,R3 effect: R1= R2 + R3 Example (in MIPS assembler form): ADD $t1, $s1, $s2 " Z " ZZ" " Z " Z       >Q>Machine representation (cont d) ( Decimal representation "ZZ=#Integer Multiply and Divide in MIPS($P#(1Multiplying two 32-bit numbers can result in up to 64 bits Integer division creates a quotient and remainder MIPS has two special regs: hi and lo Multiply results: lower bits go to lo, upper to hi Divide results: quotient goes to lo, remainder to hi * Use extra ops (such as mflo) to move lo & hi to GPRs. " h -8 -# !,>AData Transfer Instructions(I-type (base + 16 bit offsets) " ZPMIPS Does A=(B+C)+(D+E)(P (Assembly 1w $8, 48($0) 1w $9, 76($0) add $8, $8, $9 1w $9, 20($0) 1w $10, 32($0) add $9, $9, $10 add $8, $8, $9 sw $8, 100($0) " nw2Branches P (RIn most processors, the  Program Counter (PC) holds the address of the next instruction; fetch from M[(PC)] Normally, after an instruction is finished, the CPU adds n to the PC, where n is the number of bytes in the instruction. Branches allow a program to start fetching from a different place. Branches are used to implement all the control-flow commands of high-level languages, such as if-then-else, for, switch, etc.m " x " y " x " C " x " ~ " x3Branch ClassificationP( Two basic types of branches: Unconditional: Always jump to the specified address Conditional: Jump to the specified address if some condition is true; otherwise, continue with the next instruction Destination addresses can be specified in the same way as other operands (combination of registers, immediate constants, and memory locations), depending on what is supported in the ISA.   %4Branch Compilation Example(Compile the following:. "  5If-Then-Else in MIPS(Assume f,g,h,i,j in R8-R12 (respectively) bne $11, $12, Else # Branch if i<>j add $8, $9, $10 # f = g + h; j Exit # Jump to Exit Else: sub $8, $9, $10 # f = g  h; Exit: & # Code after ifx-6Observation on Branches&(Most conditional branches go a short and constant distance Fancy addressing modes not often used No use for auto-increment/decrement So in keeping with the RISC philosophy of simplicity, MIPS has only a few basic branch types.@ "  " _ " 7MIPS Branch Types&( Conditional branch: beq/bne reg1, reg2, addr - If reg1 =/ reg2, jump to PC + addr (PC-relative) Register jump: jr reg - Fetch address from specified register, and jump to it Unconditional branch: j addr - Always jump to addr (use  pseudodirect addressing)  "       9 # #R BBranch Instructions(UConditional branches - beq R1, R2, L1 # if R1 = R2 go to L1 - bne R1, R2, L1 # if R1 =\= R2 go to L1 These are R-type instructions Unconditional branches JR R8 # Jump based on register 8 Test if < 0 slt R1, R16, R17 # R1 gets 1 if R16 < R17 (slt: set-less-than) bne R1, 0, less # branch to less if R1 =\= 0 " PVP " +P  " PP                              b&0+8!Generating Branch Targets in MIPS"P"( ?Switch Compilation Example(P(dCompile the following: switch (k) { case 0: f = f + 1; break; case 1: f = f  2; break; case 3: f = -f; break; } Note the gap (case 2); z " x " ( " xx@Switch Body in MIPS(P( L0: addi $8, $8, 1 add immed. 1 to r8 (f) j Exit jump to Exit (break) L1: subi $8, $8, 2 subtract imm. 2 from r8 j Exit Another break L3: sub $8, $0, $8 f = 0 - f j Exit Another break Build the lookup table in memory: j "  " " "  -"P<ASwitch Compiled for MIPS(P((Assume k in r13) slti $14, $13, 0 # set r14 if r13 1t 0 bne $14, $0, Exit # Go to Exit if k < 0 slti $14, $13, 4 # set r14 if k < 4 beq $14, $0, Exit # Go to Exit if k 4 add $14, $13, $13 # r14 = 2*k add $14, $14, $14 # r14 = 4*k lw $14, 1000 ($14) # Base of table at 1000 jr $14 # Jump to the address \ " x " : " xt)'%g*"9"Compiling Other Control Statements#P#(r Loops: for, while: test before loop body; jump past loop body if false Do: test condition at end of loop body; jump to beginning if true Switch: (called  case statements in some other languages) Build a table of addresses Use jr (or equiv. In non-MIPS processor) Be sure to check for default and unused cases! " x " x " (< " xs " x    5  sRE'Instructions Supporting Procedure Calls(P((Jump and link jal procedure address note: return address is stored in R31 Return jr R31 Saving return address on stack R29 is used as stack pointer Parameter passing R4 ~ R7 are used for these " ZCZ " Z Z " ZZ " ZZ9             ,GpFOther MIPS Addressing Style(Constant or immediate operands lw R24, AddrConstant4(0) addi R3, R4, 5 (I type) constants are 16-bit long lui R8 255 load-upper-immediate J-type J 10000 # goto location 10000F "  " !  7       P!<5Z.[/>Function Calls in the MIPS(P(Function calls an essential feature of programming languages The program calls a function to perform some task When the function is done, the CPU continues where it left off in the calling program But how do we know where we left off? Z= "  -' " ='BCalling a Function in the MIPS(P(Use the jal ( jump and link ) instruction jal addr just like  j addr  except The  return address (PC) + 4 placed in R31 This is the address of the next instruction after the jal Use jr $31 to returndO " { -.tlC Call Example( P (Caller Callee add $4, $0, 1000 F: 1w $6, 0($4) add $5, $0, 1200 1w $7, 0($5) add $1, $0, 1 sw $6, 0($5) sw $1, 0($4) sw $7, 0($4) add $1, $1, $1 jr $31 sw $1, 0 ($5) jal F sub $1, $1, $2 What does F do?  " x "  " x " ( " x i *'D Difficulties with Function Calls(!P (This example works OK. But what if: The function F calls another function? The caller had something important in regs R6 and/or R7? The called function calls itself? Each version of a function should have its own copies of variables These are arranged in a stack, as a pile of frames.Z$ " x -xw " x$wqE Stack Example(P (H Assume function A calls B, which calls C. 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' xB   H1?  xB   H1?$ $ xB   H1?  xB   H1?  xB   H1?  xB  H1?  xB  H1?  xB  H1?  xB  H1?  xB  H1?=xB  H1?@iixB  H1?CxB  H1?@>>N u   u f  61?u   Tgֳgֳ?]  6Memory MN b\   b\ l  <1?|\   T\ gֳgֳ?b` 3CPU  T gֳgֳ?3 9 Registers   N     l  <1?! l  <1?,D    T gֳgֳ?+W  AArithmetic unit l ! <1?H,D  " T gֳgֳ?9+W  AMultiply divide l # <1?6   $ TT gֳgֳ?'   4Lo l % <1?T   & T gֳgֳ?K   4Hi  '  B!CGDEF1?F  F @  xB ( H1?I   )  B~CBDE F1?}}A@, *  B~CBDE F1?}A@*xB + H1?dd , T gֳgֳ?VZ/ < $0 $31 U  xB - H1? . ZZ\ gֳgֳ?t 3...N    /   l 0 <1?   1 T # gֳgֳ? W CCoprocessor 1 (FPU) 2 Tp' gֳgֳ?S *- 9 Registers  0N O e  3 O e l 4 <1? l 5 <1? X ,p  6 TH+ gֳgֳ?O W e  AArithmetic unit xB 7 H1? ZZ 8 T0 gֳgֳ? & < $0 $31 U  xB 9 H1?  : ZZ- gֳgֳ? v 3...xB ; H1?ZZ` xB < H1?j  xB = H1?  6 eN RD 4 > RD 4l ? <1?RD 4 @ T7 gֳgֳ?j u  ]+Coprocessor 0 (traps and memory) registers,, l A <1?m 9 xB B H1?" = "  C T= gֳgֳ?s   ]BadVAddr Status l D <1? i \ xB E H1?  `   F T(B gֳgֳ?| o  = Cause EPC   xB HB H1? xB I H1?~  J NA ??o 7 X $ 0 0H  0޽h ? 333gggy___PPT10Y+D='  = @B +!  0 H@@(    C x@ gֳgֳ ??PP     C xhG gֳgֳ ?@P     H  0޽h ? 333gggy___PPT10Y+D='  = @B +y  0 PD0(  Dx D c $N ?P   x D c $|O @Pj    H D 0޽h ? @Eff؂oy___PPT10Y+D='  = @B +%  0 $$`55HE$(  Hx H c $09?P   " "|" H# #">2 ` H <s ? 9|" XReturn address @` H <t ?9 " N31 @` H <\ ?9" o$ra @` H < ? Q |9 W Frame pointer @` H < ?Q 9 N30 @`  H <X ?Q 9 o$fp @`  H <du ? h |Q  W Stack pointer @`  H <0 ?h Q  N29 @`  H <8 ?h Q  M$sp @`  H <x ?  |h  XGlobal pointer @` H < ? h  N28 @` H < ? h  o$gp @` H <H ? |  b(Reserved for OS kernel) @` H < ?   Q26-27 @` H <T ?   K- @` H <1 ? |  V Saved values   @` H < 1 ?  Q16-23 @` H <1 ?   Q$s0-$s7 @` H <1 ? |  {Temporaries (NOT SAVED)2   @` H <(1 ?  W 8-15, 24-25   @` H <T11 ?  Q$t0-$t9 @` H <:1 ? | uArgs to functions @` H <HD1 ?  O4-7 @` H <0M1 ? Q$a0-$a3 @` H <V1 ? | Return values/expression eval @` H <H`1 ?  O2-3 @` H <0i1 ? Q$v0-$v1 @` H <,r1 ? | b(Reserved for assembler) @`  H <{1 ?   M1 @` !H <1 ?  K- @` "H <p1 ? "|  T Constant 0   @` #H <1 ?"  M0 @` $H <ԟ1 ?"  O$zero @`fB %H 6o ?"|"`B &H 01 ? | `B 'H 01 ?|`B (H 01 ?|`B )H 01 ?|`B *H 01 ? | `B +H 01 ? | `B ,H 01 ? | `B -H 01 ?h |h `B .H 01 ?Q |Q `B /H 01 ?9|9fB 0H 6o ?"|"fB 1H 6o ?""`B 2H 01 ?""`B 3H 01 ? " "fB 4H 6o ?|"|" 5H <1 w; z Names Regs Purpose! !H H 0޽h ? @Eff؂oy___PPT10Y+D='  = @B +8 0 _Wp(    T 1 gֳgֳ?H U#MIPS registers and usage convention$$  NA ??XX $ 0 0H  0޽h ? 333gggy___PPT10Y+D='  = @B +  0 B:(    3 r1 gֳgֳ ??PP  1    C x1 gֳgֳ ?@Pp`  1  H  0޽h ? 333gggy___PPT10Y+D='  = @B +  0 ))b(    B1  ?P  1  X  0)X  0X  0 X  0 xX  0vIX  0G   <1  8op    <1  Rrs    <1   Rrt    <<1   8rd    <1 ! Ushamt   <1  Ufunct   <h1  <6 bits   <1 |n <5 bits   <1 8 *  <5 bits   <1 "  <5 bits   <1  <5 bits   <1  <6 bits X  01 X  0 X  0 X  0 4   <1   8op   <D3   Rrs   <3   Rrt   <L 3 /  =address   <P1  |  <6 bits   <83  n`  <5 bits   <3  *   <5 bits    <3  2  =16 bits X ! 0D #' X " 0D <'  # <3 8 2  8op  $ <3 9  3  =address  % <L#3 > |n8 <6 bits  & <('3 > 8 =26 bits  ' <!3 I` >R-Format    ( <.3 I  >I-Format    ) <23 M I<G  >J-Format   H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +y  0 0(  x  c $t;3 ?P  3  x  c $L<3 @PLp{  3  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +   0    (    3 rI3 gֳgֳ ?@Ps 3  |F   SnMll  <1?  TM3 gֳgֳ? opl  <1?S  TQ3 gֳgֳ?ml 0rsl  <1?_'    TPU3 gֳgֳ?A *  0rtl   <1?   TY3 gֳgֳ?=< 3functl   <1?0     T]3 gֳgֳ? &  rdl  <1?  Ta3 gֳgֳ?=| 3shamt  THd3 gֳgֳ?NA xH6 bits 5 bits 5 bits 5 bits 5 bits 6 bitsII  Ni3 gֳgֳ?p k;MIPS fields are given names to make them easier to discuss:<<-  C x8h3 1))?<6 +Machine Representation of MIPS Insrtuctions, , H  0޽h ? 333gggy___PPT10Y+D='  = @B +-  0 TL(    3 rz3 gֳgֳ ??P[  3    C x`{3 gֳgֳ ?@P&C  3     C x|3 1))?   b.Decimal representation: 0 17 18 8 0 32 / /H  0޽h ? 333gggy___PPT10Y+D='  = @B +3  0 JB0 !p(  pr p S `3 ?P  3  r p S 13 @P@ 3  F  p  l p <1? p T3 gֳgֳ?q 0l p <1?S p T3 gֳgֳ?m 17l  p <1?_'   p Tp3 gֳgֳ?A u  18l  p <1?  p Tl3 gֳgֳ?=  32l  p <1?0   p T3 gֳgֳ?   8l p <1? p T3 gֳgֳ?=  0 p T3 gֳgֳ?NA xH6 bits 5 bits 5 bits 5 bits 5 bits 6 bitsII p C x3 1))?U :u  , j p B1?   p Z3 gֳgֳ? 0  000000j p B1?   p Z<3 gֳgֳ? X  10001j p B1? z  p Z83 gֳgֳ? $ x  10010j p B1? %  p Z 3 gֳgֳ? `  100000j p B1? K  p Z3 gֳgֳ? 9  01000j p B1? U  p Z,3 gֳgֳ?   00000  p Z3 gֳgֳ?  xH6 bits 5 bits 5 bits 5 bits 5 bits 6 bitsII !p C xP81))?  c  LBinary representation: H p 0޽h ? @Eff؂o___PPT10i.*$v/+D='  = @B +y  0 0(  x  c $3 ?P  3  x  c $3 @PLp{  3  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +s   0    * (    3 r43 gֳgֳ ??PW  3    3 r 3 gֳgֳ ?@P 3  d  <1?$<  T3 gֳgֳ?C6 2opd  <1?$ <  T`3 gֳgֳ?6 Lrsd  <1?$ <  TD3 gֳgֳ? 6 Lrtd  <1?$ U<  T3 gֳgֳ?/ 8 address   T4 gֳgֳ?5 / n<6 bits 5 bits 5 bits 16 bits ==z  N4 gֳgֳ?pk Example; lw t0, 8 ($s3) --- # Temporary reg t0 gets A[8] Note: s3 stores the start address of array A Also, rs is the base register ($S3 in this case  also called index register), rt (in this case $t0) stores the result (as destination register).   %  $P GGBH  0޽h ? 333gggy___PPT10Y+D='  = @B +   0 . & l (  lx l c $$3 ?P(  4  x l c $3 @PBg  3   F T   l  ' l d 4  Rectangle: Click to edit Master text styles Second level Third level Fourth level Fifth levelf y  Gop rs rt rd sh. Ft. 35 0 8 48 35 0 9 76 0 8 9 8 0 32 35 0 9 20 35 0 10 32 0 9 10 9 0 32 0 8 9 8 0 32 43 0 8 100&H|0 nnH> )` l 0T p ZB l s *DT pZB l s *DT pZB  l s *DT [p[ZB  l s *DT ? p? ZB  l s *DT # p# ZB  l s *DT  p ZB  l s *DT p ZB l s *DT p ZB l s *Dp p ZB l s *D  ZB l s *D ZB lB s *Dm0 m ZB lB s *D/  ZB lB s *DmmPZB lB s *DN l C x34 1))?t&  C An Example  H l 0޽h ? @Eff؂oy___PPT10Y+D='  = @B +y  0 0(  x  c $PF4 ?PP  4  x  c $(G4 @PV  4  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +y  0 0(  x  c $8W4 ?P  4  x  c $X4 @Pu 4  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +   0   , (  x  c $,g4 ?P  4  x  c $h4 @Py0 4    Pi4  Rectangle: Click to edit Master text styles Second level Third level Fourth level Fifth level  ^ if ( i == j) f = g + h; else f = g  h;60|0 nn/ RB  s *n R  s * Quv   <s4 U M  K f = g + h& |0 nn   <w4  J i == j?& |0 nn R   s * s v    <Hz4 V  N  K f = g - h& |0 nn j   BGX H|IX 7 d   <GMHZIM7   d"  @ <ZG:aHyI.v  w   <4 B : H i = j&|0 nn  <ă4 I x A h i j@|0 nnXB  0D    <4    H Exit:&|0 nn  <؍4     H Else:&|0 nnH  0޽h ??`      @Eff؂oy___PPT10Y+D='  = @B +y  0 00(  x  c $p4 ?P  4  x  c $H4 @Pb  4  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +[  0 z@(  x  c $4 ?P  4  Z  4  @PRectangle: Click to edit Master text styles Second level Third level Fourth level Fifth level5 4  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +[  0 zP(  x  c $ܹ4 ?P  4  Z  4  @PRectangle: Click to edit Master text styles Second level Third level Fourth level Fifth levelV  4  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +  0 <4`(    3 r`4 gֳgֳ ??P`  4    3 r4 gֳgֳ ?@PD 4  H  0޽h ? 333gggy___PPT10Y+D='  = @B +r  0 p&')(    BCDEF  ll @ zZ x  c $4 ?P  4  X  0< RB  s *D<RB  s *D9;<RB  s *D?abX  0 X   0 R   s * pX   0p )   <H4 "+n <Memory    <4 z q :Word   BCDEF ll @l\   <4 % 8op   <D9 = Rrs   <9 1U Rrt   <L 9 9  =Address   <4  8PC R2  s * w  <9   7+ XB  0D  X  0  RB  s *D  X  0  D X  0 w R  s *v / X  0/    <9  *m  <Memory   <49 \ y0  :Word   < 9    8op    <p9    =Address  ! <l"9 x L  8PC R2 " s *  6  # <&9 r  F  9: XB $ 0D  % <d+9 h < N4 PC-relative addressing  & <d09 (   q5 Pseudodirect addressing   H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +y  0 0(  x  c $99 ?P  9  x  c $X:9 @P  9  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +  0    (  x  c $J9 ?P  9  x  c $J9 @P   9   0  # #""  ,$@  0  <lM9 ?08  W address of L3 @`  <]9 ?0R 8  Yaddress of Exit @`  <f9 ?0l R  W address of L1 @`  < p9 ?0 l  W address of L0 @`fB   6o ?0  `B   01 ?0l l `B   01 ?0R R `B   01 ?08 8 fB   6o ?0fB  6o ?0 0fB  6o ?   <r9  ),$  0 K1000 1004 1008 1012 H  0޽h ? @Eff؂o___PPT10+JSD5'  = @B D' = @BA?%,( < +O%,( < +D'' =%(D' =%(D1' =4@BBBB%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-m6Bbox(in)*<3<*D>' =A@BBBB0B%(D' =1:Bvisible*o3>+B#style.visibility<*%(D' =-m6Bbox(in)*<3<*+8+0+0 +y  0  0(   x   c $89 ?P  9  x   c $d9 @P5 9  H   0޽h ? @Eff؂oy___PPT10Y+D='  = @B +y  0 0(  x  c $9 ?P  9  x  c $l9 @Pyt 9  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +  0 B:(    3 r\gֳgֳ ??P     C xMgֳgֳ ?@P  H  0޽h ? 333gggy___PPT10Y+D='  = @B +  0 B:(    3 r 9 gֳgֳ ??PS  9    C x9 gֳgֳ ?@P0 9  H  0޽h ? 333gggy___PPT10Y+D='  = @B +r 0 @)(    @ @ T9 gֳgֳ?z = ? MIPS operands @ T9 gֳgֳ?  HMIPS assembly language @ # lA ?1))??  @  fA ?1))?2 H @ 0޽h ? 333gggy___PPT10Y+D='  = @B + 0 D(  D D T9 gֳgֳ?lG GMIPS machine language D  fA  ?1))?|(  H D 0޽h ? 333gggy___PPT10Y+D='  = @B +y  0 0(  x  c $49 ?P  9  x  c $ 9 @Pc  9  H  0޽h ? @Eff؂oy___PPT10Y+D='  = @B +y  0 $0(  $x $ c $9 ?P  9  x $ c $9 @PuSL  9  H $ 0޽h ? @Eff؂oy___PPT10Y+D='  = @B +y  0  (0(  (x ( c $x9 ?P  9  x ( c $ 9 @P  9  H ( 0޽h ? @Eff؂oy___PPT10Y+D='  = @B +y  0 0,0(  ,x , c $<9 ?P  9  x , c $9 @PA|  9  H , 0޽h ? @Eff؂oy___PPT10Y+D='  = @B +  0 ( @0(  0x 0 c $L = ?P  =  x 0 c $ = @Pt$ =  F /o 3V 0  | ` 0 0/ 3D 0 <9 wo V hA s vars    0 <= V dx=  =start A X 0 0 GK j   0 <=   |  hA s vars     0 <= V w =  ? A calls B   X  0 0 j   0 <=  r|  hA s vars     0 <T"= V =  ? B calls C   X 0 0 -1j  0 <&=  u|  hA s vars    0 <+= V U =  ? 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