CPEG 323: Introduction to Computer Systems Engineering (Fall 2017)

Instructor: Hui Fang

Time & Place: MWF 9:05-9:55am, Gore Hall Room 104


Basic Information



A basic knowledge of high-level programming languages and digital logic design (e.g. CPEG202,CPEG220) is required.


Regrade requests should be submitted in writing within one week after the assignment or exam in question is returned.

Late Assignment Policy

Late submissions will be penalized on an hourly scheme.
Up to 6 hour late, -15%
Up to 12 hours late, -40%
Up to 18 hours late, -70%
Zero grade after 24 hours

Schedule (tentative)

Date Topic HW/MP Due
08/30 (W) Course Introduction
09/01 (F) Number Representation HW1 out
09/04 (M) Holiday, No class
09/06 (W) Discussion 1: Numbers, Review of C
09/08 (F) Review of C

09/11 (M) Discussion 2: Bitwise Operation HW1 due, MP1 out
09/13 (W) MIPS (1)
09/15 (F) MIPS (2)
09/18 (M) Discussion: MIPS - loops
09/20 (W) Intro. to the MIPS (III): Functions
09/22 (F) Intro. to MIPS (IV): Recusion

09/25 (M) Discussion: MIPS - recursion

MP1 due, MP2 out
09/27 (W) Discussion: MIPS - summary

09/29 (F) Instructions as numbers (1)
10/2(M) Instructions as numbers (2)
10/4 (W) Instructions a numbers (3)
10/6 (F) Compilation, Assembly, Linking
10/9 (M) Performance MP2 due, HW2 out
10/11 (W) Discussion 5: performance
10/13 (F) Intro. to CPU Design
10/16 (M) Single Cyble CpU
10/18 (W) Midterm Review
10/20 (F) Midterm
10/23 (M) Discussion 6: Single cycle CPU and Performance HW2 due
10/25 (W) Discussion 7.
10/27 (F) Pipelining (I) HW3 out
10/30 (M) Pipelining (II)
11/1 (W) Hazards(I)
11/3 (F) Hazards(II)
11/6 (M) Discussion: Hazards
11/8 (W) Cache(I)
11/10 (F) Cache(II) HW3 due, MP3 out
11/13 (M) Cache (III)
11/15 (W) Cache(IV)
11/17 (F) Cache (V)
11/20 (M) Holiday, No class
11/22 (W) Holiday, No class
11/24 (F) Holiday, No class
11/27 (M) Disks MP3 due, HW4 out
11/29 (W) Virtual Memory (I)
12/1 (F) Virtual Memory (II)
12/4 (M) I/O
12/6 (W) Discussion Section HW4 due
12/8(F) Course summary and Q/A
TBD Final Exam