Welcome to the

CPEG 324 Home Page

Spring 2004


General Information:

Instructor:  John G. Elias
TA:  Eric Frett and Guohua Jing
Lecture Hours:  TR 12:30-1:45pm 
Lecture Location:  127 Memorial Hall 
Lab Hours: TWR 2-4pm 
Instructor Office Hours:  TR 5-6pm 142 Evans Hall  
   
 

The following resources are available for students:
 
Help with Verilog Manuals

Verilog Simulator Download

Design notebook guidelines
Schematic diagram rules.

 

.


Last modified:  February 16, 2004 

Electrical and Computer Engineering |
ŠUniversity of Delaware