A no-op instruction is an instruction that has no effect.
A common no-op instruction is sll $0,$0,0
Here is a sequence of instructions. The "load" and "add" represent typical instructions. The "jump" instruction shows the address we wish to put into the PC. (The actual MIPS instruction for this involves details that we are skipping for the moment.)
The last instruction, a no-op, fills the branch delay slot to give the PC time to change. Once started, the four instructions execute in an unending loop.
Address | Instruction (details omitted) | PC just after this
instruction has executed (at the bottom of the cycle) |
---|---|---|
............... | ........... | 00400000 |
00400000 | load | 00400004 |
00400004 | add | 00400008 |
00400008 | jump 0x00400000 | 0040000C |
0040000C | no-op | 00400000 effect of the jump |
A loop structure is created with the jump instruction. The intent of the jump instruction is to put the address 0x00400000 into the PC. However, this effect is is not seen until after the instruction in the branch delay slot has executed.
(Thought question:) Is there anything in hardware that guarantees that the target of a jump instruction is an instruction (and not data)?