Answer:
Yes.
The details are slightly complicated. But rest assured that there are international standards for this.
Yes.
The details are slightly complicated. But rest assured that there are international standards for this.
The
MIPS instruction that loads a word into a register is
the lw instruction.
The store word instruction is sw.
Each must specify a register and a memory address.
A MIPS instruction is 32 bits (always).
A MIPS memory address is 32 bits (always).
How can a load or store instruction specify
an address that is the same size as itself?
An instruction that refers to memory uses a base register and an offset. The base register is a general purpose register that contains a 32-bit address. The offset is a 16-bit signed integer contained in the instruction. The sum of the address in the base register with the (sign-extended) offset forms the memory address.
Here is the load word instruction in assembly language:
lw d,off(b) # $d <-- Word from memory address b+off
# b is a register. off is 16-bit two's complement.
At execution time two things happen: (1) an address is calculated using
the base register b and the offset off, and
(2) data is fetched from memory at that address.