ELEG 450/650: Integrated Circuit Design and Fabrication

Department Of Electrical Engineering, University Of Delaware

Spring 2002, Professor James Kolodzey

DESCRIPTION:

ELEG 450/650 teaches the principles underlying the design and fabrication of integrated circuits, nanostructures and microelectromechanical systems (MEMS). Students will learn the total procedure; from simple logic design, to transistor sizing and mask design rules, through materials processing to circuit probing and testing. The approach combines lectures on theory with hands-on laboratory experience. Students will design a logic circuit and a MEMS structure using CMOS transistors, layout the masks by computer-aided design, fabricate the circuit by transferring the mask pattern onto a piece of Silicon wafer, and will test the circuit. L-Edit graphics editing software and perhaps Auto CAD will be used for mask pattern design. Each student will be given their own silicon wafer chips for the fabrication steps of oxidation, diffusion and metallization. Students will learn semiconductor measurement techniques to test and evaluate the effectiveness of process steps, and to troubleshoot the fabrication process, if necessary. Students will learn to use the SUPREM process simulation software. Reports on fabrication progress will be submitted weekly. ELEG 340, or equivalent, is a prerequisite. Related courses including ELEG 622 (Electronic Materials Processing), covering the theoretical aspects of fabrication in more detail, and CPEG 460/660 (VLSI Systems), covering the circuit design aspects of VLSI in more detail.

TEXTS:

primary:

"Introduction to Microelectronic Fabrication," 2^nd ed. by Richard C. Jaeger, Modular Series on Solid State Devices, Prentice Hall, 2002

(ISBN 0-201-44494-7).

secondary:

“Physical Design of CMOS Integrated Circuits Using L-EDIT,” by John P. Uyemura, PWS, 1995.

USEFUL REFERENCES (not required to purchase - many on reserve in Morris Library)

"Silicon VLSI Technology: Fundamentals, Practice and Modeling," by J.D. Plummer, M. Deal and P. B. Griffin, Prentice Hall, 2000.

“VLSI Fabrication Principles,” 2^nd ed., by S. K. Ghandhi, Wiley, 1994.

Design and Technology of Integrated Circuits, Donard deCogan, J. Wiley, 1990.

Microelectronic Processing, by W. Scott Ruska, McGraw-Hill.

Introduction to Integrated Circuit Engineering, by D.K. Reinhard, Houghton Mifflin Company.

Basic Integrated Circuit Engineering, by Douglas J. Hamilton and William G. Howard, McGraw-Hill Book Company.

Introduction to VLSI Design, E.D. Fabricius, McGraw-Hill, 1990.

COURSE PLAN

A. Goals of Course: valuable hands-on circuit, device and materials skills

1. Design of CMOS circuits: Student will be able to design simple digital circuits and understand how the process, design, and performance are interrelated. In addition, they will learn how the basic inverter affects larger systems.

2. Process: Students will fabricate their own CMOS integrated circuit, while understanding the process well enough to trouble shoot it.

B. Grading

1. Progress reports: 25%. Due weekly. During processing these reports give an indication of where the students are in the fabrication process, and any problems encountered. Because the pace of circuit processing is largely determined by these reports, an accurate representation of progress is critical. The attached format must be followed. Include your circuit designs and measurements.

2. Homework: 15%. Students will be assigned occasional homework problems.

3. Quizzes: 25%. Before entering the laboratories, students must fully understand the safety requirements for the laboratory. This understanding will be tested by a short safety quiz. In order to work in the labs, students must perform satisfactorily on this quiz. Other quizzes will be given.

4. Laboratory safety and courtesy: 5%. Students must be courteous, neat and safe in the lab. Leave the lab in better shape then when you entered it.

5. Final report and demonstration of circuit: 30%. This should include the testing and characterization results of the circuit. Working circuits need to be demonstrated to the instructor or T.A. Grading criteria are based on successful operation of the circuit and how well you explain it.

C. Organization of Course

1. Lectures: Lectures will typically be 2 hours per week. To get started in the first few weeks, lectures will be 3 hours. The lectures are roughly divided into two parts: (a) CMOS digital circuit theory, and (b) processing and laboratory techniques.

2. Laboratory: ELEG 450/650 is a laboratory intensive class. Each person will need 3 hours of lab time per week.

D. Project for Course

1. Build test transistors: To familiarize themselves with the process before building their circuits, students will build an array of transistors from an existing mask set.

2. Chose and design logic circuit and mask: Student will chose a simple digital circuit and design the mask layout for it. Student will then build and test circuit.

E. Progress Reports

A report is required to keep track of your progress. It should specifically detail your accomplishments of the preceding period and include plans for the next lab meeting. The report format is given below. The reports are to be 1 -2 pages long and are due Monday in class. The report should be succinct with enough information so that a skilled worker would be able to repeat your steps. Include the following sections:

1. OBJECTIVE:
State the objective(s) of your week's project(s) in one to two sentences.

2. METHODOLOGY:
Give a short description of the details of the approach taken.

3. RESULTS:
Review the previous week's results. Include the major supporting data.

4. PROBLEMS:
State any problems that hinder your progress such as an unsuccessful process step.

5. PLAN:
Give your plan for the upcoming week. Be specific about what you next plan to accomplish.