Artificial Dendritic Trees

John G. Elias
Department of Electrical Engineering
University of Delaware
Newark, DE. 19716

Abstract

The electronic architecture and dynamic signal processing capabilities of an artificial dendritic tree which can be used to process and classify dynamic signals is described. The electrical circuit architecture is modeled after neurons that have spatially extensive dendritic trees. The artificial dendritic tree is a hybrid VLSI circuit and is sensitive to both temporal and spatial signal characteristics. It does not use the conventional neural network concept of weights, and as such it does not use multipliers, adders, look-up-tables, microprocessors or other complex computational units to process signals. The weights of conventional neural networks, which take the form of numerical, resistive, voltage, or current values, but do not have any spatial or temporal content, are replaced with connections whose spatial location have both a temporal and scaling significance.
Home     Background     Publications     Hardware     Technical Support     FAQs     Contacts

Neuromorphic Systems Laboratory - Department of Electrical and Computer Enginering
140 Evans Hall Newark, DE 19716-3130
©University of Delaware 2001 - all rights reserved