Hardware

The silicon neurons we develop consist of spatially extensive dendritic branches modeled electrically by arrays of MOS transistors, capacitors, and programmable resistors that provide a wide range of dynamic response. Depolarizing, hyperpolarizing, and shunting synapses, distributed along the length of the dendrites, are activated with impulse signals that originate from other neuromorphs, or from itself, or from various sensors. Postsynaptic potentials are integrated by the entire dendritic tree, and the instantaneous "membrane" potential at the soma is pulse-frequency coded. The output of a neuromorph may connect to actuators or to the synapses of the same and/or other neuromorphs. Coupled oscillatory behavior and complex sensory processing capabilities are realized with the appropriate connection pattern and dendritic tree dynamics. Rich patterns of interconnections and signal delays are made possible by supporting virtual wire circuitry.

The number of parameters that establishes a system can be extremely large, even for systems having only a few neuromorphs. Consider the parameters for just one neuromorph:

• may connect to hundreds of synapses, each connection has its own axonal delay and synaptic weight.
• has it own programmable soma integration time constant.
• has independently programmable dendritic membrane and axial resistances.
• has an activity-dependent spiking threshold voltage.
• has four to eight spatially extensive dendritic branches.
• has thirty one synapses on each branch: 15 excitatory, one shunting, and 15 hyperpolarizing.

For more details on our research, please help yourself to any of our recent publications available as Postscript files.

One can find more information on other groups involved in research on neuromorphic systems and devices in Physics of Computation at Caltech.