@article{DBLP:journals/tcad/LiuWZYLWX21,
  author    = {Weihua Liu and
               Fei Wu and
               Meng Zhang and
               Chengmo Yang and
               Zhonghai Lu and
               Jiguang Wan and
               Changsheng Xie},
  title     = {{DEPS:} Exploiting a Dynamic Error Prechecking Scheme to Improve the
               Read Performance of {SSD}},
  journal   = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume    = {40},
  number    = {1},
  pages     = {66--77},
  year      = {2021},
  url       = {https://doi.org/10.1109/TCAD.2020.2994266},
  doi       = {10.1109/TCAD.2020.2994266},
  timestamp = {Tue, 23 Mar 2021 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/tcad/LiuWZYLWX21.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/MengHY21,
  author    = {Fanruo Meng and
               Fateme S. Hosseini and
               Chengmo Yang},
  title     = {A Self-Test Framework for Detecting Fault-induced Accuracy Drop in
               Neural Network Accelerators},
  booktitle = {{ASPDAC} '21: 26th Asia and South Pacific Design Automation Conference,
               Tokyo, Japan, January 18-21, 2021},
  pages     = {722--727},
  publisher = {{ACM}},
  year      = {2021},
  url       = {https://doi.org/10.1145/3394885.3431519},
  doi       = {10.1145/3394885.3431519},
  timestamp = {Mon, 03 May 2021 16:42:27 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/MengHY21.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jetc/ZhangPLYXH20,
  author    = {Xinyi Zhang and
               Clay Patterson and
               Yongpan Liu and
               Chengmo Yang and
               Chun Jason Xue and
               Jingtong Hu},
  title     = {Low Overhead Online Data Flow Tracking for Intermittently Powered
               Non-Volatile FPGAs},
  journal   = {{ACM} J. Emerg. Technol. Comput. Syst.},
  volume    = {16},
  number    = {3},
  pages     = {26:1--26:20},
  year      = {2020},
  url       = {https://dl.acm.org/doi/10.1145/3371392},
  timestamp = {Wed, 02 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/jetc/ZhangPLYXH20.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tetc/LiuCY20,
  author    = {Chen Liu and
               Patrick Cronin and
               Chengmo Yang},
  title     = {Securing Cyber-Physical Systems from Hardware Trojan Collusion},
  journal   = {{IEEE} Trans. Emerg. Top. Comput.},
  volume    = {8},
  number    = {3},
  pages     = {655--667},
  year      = {2020},
  url       = {https://doi.org/10.1109/TETC.2017.2787694},
  doi       = {10.1109/TETC.2017.2787694},
  timestamp = {Sat, 19 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tetc/LiuCY20.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/LiuLLWY20,
  author    = {Qi Liu and
               Tao Liu and
               Zihao Liu and
               Wujie Wen and
               Chengmo Yang},
  title     = {Monitoring the Health of Emerging Neural Network Accelerators with
               Cost-effective Concurrent Test},
  booktitle = {57th {ACM/IEEE} Design Automation Conference, {DAC} 2020, San Francisco,
               CA, USA, July 20-24, 2020},
  pages     = {1--6},
  publisher = {{IEEE}},
  year      = {2020},
  url       = {https://doi.org/10.1109/DAC18072.2020.9218675},
  doi       = {10.1109/DAC18072.2020.9218675},
  timestamp = {Thu, 15 Oct 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/dac/LiuLLWY20.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/YangCAOCO20,
  author    = {Chengmo Yang and
               Patrick Cronin and
               Agamyrat Agambayev and
               Sule Ozev and
               A. Enis {\c{C}}etin and
               Alex Orailoglu},
  title     = {A Crowd-Based Explosive Detection System with Two-Level Feedback Sensor
               Calibration},
  booktitle = {{IEEE/ACM} International Conference On Computer Aided Design, {ICCAD}
               2020, San Diego, CA, USA, November 2-5, 2020},
  pages     = {8:1--8:9},
  publisher = {{IEEE}},
  year      = {2020},
  url       = {https://doi.org/10.1145/3400302.3415670},
  doi       = {10.1145/3400302.3415670},
  timestamp = {Mon, 18 Jan 2021 09:56:56 +0100},
  biburl    = {https://dblp.org/rec/conf/iccad/YangCAOCO20.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2002-02094,
  author    = {Xinyi Zhang and
               Clay Patterson and
               Yongpan Liu and
               Chengmo Yang and
               Chun Jason Xue and
               Jingtong Hu},
  title     = {Low Overhead Online Data Flow Tracking for Intermittently Powered
               Non-volatile FPGAs},
  journal   = {CoRR},
  volume    = {abs/2002.02094},
  year      = {2020},
  url       = {https://arxiv.org/abs/2002.02094},
  archivePrefix = {arXiv},
  eprint    = {2002.02094},
  timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/corr/abs-2002-02094.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2008-04449,
  author    = {Rosario Cammarota and
               Matthias Schunter and
               Anand Rajan and
               Fabian Boemer and
               {\'{A}}gnes Kiss and
               Amos Treiber and
               Christian Weinert and
               Thomas Schneider and
               Emmanuel Stapf and
               Ahmad{-}Reza Sadeghi and
               Daniel Demmler and
               Huili Chen and
               Siam Umar Hussain and
               M. Sadegh Riazi and
               Farinaz Koushanfar and
               Saransh Gupta and
               Tajana Simunic Rosing and
               Kamalika Chaudhuri and
               Hamid Nejatollahi and
               Nikil D. Dutt and
               Mohsen Imani and
               Kim Laine and
               Anuj Dubey and
               Aydin Aysu and
               Fateme Sadat Hosseini and
               Chengmo Yang and
               Eric Wallace and
               Pamela Norton},
  title     = {Trustworthy {AI} Inference Systems: An Industry Research View},
  journal   = {CoRR},
  volume    = {abs/2008.04449},
  year      = {2020},
  url       = {https://arxiv.org/abs/2008.04449},
  archivePrefix = {arXiv},
  eprint    = {2008.04449},
  timestamp = {Sat, 23 Jan 2021 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/corr/abs-2008-04449.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/access/BadawiAOYOC19,
  author    = {Diaa Badawi and
               Tuba Ayhan and
               Sule Ozev and
               Chengmo Yang and
               Alex Orailoglu and
               Ahmet Enis {\c{C}}etin},
  title     = {Detecting Gas Vapor Leaks Using Uncalibrated Sensors},
  journal   = {{IEEE} Access},
  volume    = {7},
  pages     = {155701--155710},
  year      = {2019},
  url       = {https://doi.org/10.1109/ACCESS.2019.2949740},
  doi       = {10.1109/ACCESS.2019.2949740},
  timestamp = {Tue, 26 Nov 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/access/BadawiAOYOC19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/YueLYWGLYY19,
  author    = {Jinshan Yue and
               Yongpan Liu and
               Zhe Yuan and
               Zhibo Wang and
               Qingwei Guo and
               Jinyang Li and
               Chengmo Yang and
               Huazhong Yang},
  title     = {A 3.77TOPS/W Convolutional Neural Network Processor With Priority-Driven
               Kernel Optimization},
  journal   = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume    = {66-II},
  number    = {2},
  pages     = {277--281},
  year      = {2019},
  url       = {https://doi.org/10.1109/TCSII.2018.2846698},
  doi       = {10.1109/TCSII.2018.2846698},
  timestamp = {Wed, 27 May 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tcas/YueLYWGLYY19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/LiuW0WYQ19,
  author    = {Tao Liu and
               Wujie Wen and
               Lei Jiang and
               Yanzhi Wang and
               Chengmo Yang and
               Gang Quan},
  title     = {A Fault-Tolerant Neural Network Architecture},
  booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019,
               {DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
  pages     = {55},
  publisher = {{ACM}},
  year      = {2019},
  url       = {https://doi.org/10.1145/3316781.3317742},
  doi       = {10.1145/3316781.3317742},
  timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl    = {https://dblp.org/rec/conf/dac/LiuW0WYQ19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/WangWYZXW19,
  author    = {Shunzhuo Wang and
               Fei Wu and
               Chengmo Yang and
               Jiaona Zhou and
               Changsheng Xie and
               Jiguang Wan},
  title     = {{WAS:} Wear Aware Superblock Management for Prolonging {SSD} Lifetime},
  booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019,
               {DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
  pages     = {213},
  publisher = {{ACM}},
  year      = {2019},
  url       = {https://doi.org/10.1145/3316781.3317929},
  doi       = {10.1145/3316781.3317929},
  timestamp = {Wed, 27 Nov 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/dac/WangWYZXW19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/HosseiniY19,
  author    = {Fateme S. Hosseini and
               Chengmo Yang},
  editor    = {J{\"{u}}rgen Teich and
               Franco Fummi},
  title     = {Compiler-Directed and Architecture-Independent Mitigation of Read
               Disturbance Errors in {STT-RAM}},
  booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
               {DATE} 2019, Florence, Italy, March 25-29, 2019},
  pages     = {222--227},
  publisher = {{IEEE}},
  year      = {2019},
  url       = {https://doi.org/10.23919/DATE.2019.8715006},
  doi       = {10.23919/DATE.2019.8715006},
  timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl    = {https://dblp.org/rec/conf/date/HosseiniY19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/YangX19,
  author    = {Chengmo Yang and
               Yuan Xue},
  editor    = {Houman Homayoun and
               Baris Taskin and
               Tinoosh Mohsenin and
               Weisheng Zhao},
  title     = {A Scalable and Process Variation Aware {NVM-FPGA} Placement Algorithm},
  booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
               2019, Tysons Corner, VA, USA, May 9-11, 2019},
  pages     = {165--170},
  publisher = {{ACM}},
  year      = {2019},
  url       = {https://doi.org/10.1145/3299874.3317971},
  doi       = {10.1145/3299874.3317971},
  timestamp = {Wed, 10 Mar 2021 14:55:38 +0100},
  biburl    = {https://dblp.org/rec/conf/glvlsi/YangX19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/YangC19,
  author    = {Chengmo Yang and
               Zeyu Chen},
  editor    = {Houman Homayoun and
               Baris Taskin and
               Tinoosh Mohsenin and
               Weisheng Zhao},
  title     = {A Processing-In-Memory Implementation of {SHA-3} Using a Voltage-Gated
               Spin Hall-Effect Driven MTJ-based Crossbar},
  booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
               2019, Tysons Corner, VA, USA, May 9-11, 2019},
  pages     = {195--200},
  publisher = {{ACM}},
  year      = {2019},
  url       = {https://doi.org/10.1145/3299874.3317972},
  doi       = {10.1145/3299874.3317972},
  timestamp = {Thu, 16 May 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/glvlsi/YangC19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/KhouzaniY19,
  author    = {Hoda Aghaei Khouzani and
               Chengmo Yang},
  editor    = {Houman Homayoun and
               Baris Taskin and
               Tinoosh Mohsenin and
               Weisheng Zhao},
  title     = {Tuning Track-based {NVM} Caches for Low-Power IoT Devices},
  booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
               2019, Tysons Corner, VA, USA, May 9-11, 2019},
  pages     = {513--518},
  publisher = {{ACM}},
  year      = {2019},
  url       = {https://doi.org/10.1145/3299874.3319335},
  doi       = {10.1145/3299874.3319335},
  timestamp = {Thu, 16 May 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/glvlsi/KhouzaniY19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/host/CroninY19,
  author    = {Patrick Cronin and
               Chengmo Yang},
  title     = {A Fetching Tale: Covert Communication with the Hardware Prefetcher},
  booktitle = {{IEEE} International Symposium on Hardware Oriented Security and Trust,
               {HOST} 2019, McLean, VA, USA, May 5-10, 2019},
  pages     = {101--110},
  publisher = {{IEEE}},
  year      = {2019},
  url       = {https://doi.org/10.1109/HST.2019.8741033},
  doi       = {10.1109/HST.2019.8741033},
  timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl    = {https://dblp.org/rec/conf/host/CroninY19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/BadawiOCYOC19,
  author    = {Diaa Badawi and
               Sule Ozev and
               Jennifer Blain Christen and
               Chengmo Yang and
               Alex Orailoglu and
               A. Enis {\c{C}}etin},
  title     = {Detecting Gas Vapor Leaks through Uncalibrated Sensor Based {CPS}},
  booktitle = {{IEEE} International Conference on Acoustics, Speech and Signal Processing,
               {ICASSP} 2019, Brighton, United Kingdom, May 12-17, 2019},
  pages     = {8296--8300},
  publisher = {{IEEE}},
  year      = {2019},
  url       = {https://doi.org/10.1109/ICASSP.2019.8682204},
  doi       = {10.1109/ICASSP.2019.8682204},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/icassp/BadawiOCYOC19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/CroninGMTY19,
  author    = {Patrick Cronin and
               Charles Gouert and
               Dimitris Mouris and
               Nektarios Georgios Tsoutsos and
               Chengmo Yang},
  title     = {Covert Data Exfiltration Using Light and Power Channels},
  booktitle = {37th {IEEE} International Conference on Computer Design, {ICCD} 2019,
               Abu Dhabi, United Arab Emirates, November 17-20, 2019},
  pages     = {301--304},
  publisher = {{IEEE}},
  year      = {2019},
  url       = {https://doi.org/10.1109/ICCD46524.2019.00045},
  doi       = {10.1109/ICCD46524.2019.00045},
  timestamp = {Tue, 18 Feb 2020 15:29:20 +0100},
  biburl    = {https://dblp.org/rec/conf/iccd/CroninGMTY19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icess/HosseiniY19,
  author    = {Fateme S. Hosseini and
               Chengmo Yang},
  title     = {Comprehensive Evaluation of Program Reliability with ComFIDet: An
               Integrated Fault Injection and Detection Framework for Embedded Systems},
  booktitle = {15th {IEEE} International Conference on Embedded Software and Systems,
               {ICESS} 2019, Las Vegas, NV, USA, June 2-3, 2019},
  pages     = {1--8},
  publisher = {{IEEE}},
  year      = {2019},
  url       = {https://doi.org/10.1109/ICESS.2019.8782444},
  doi       = {10.1109/ICESS.2019.8782444},
  timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl    = {https://dblp.org/rec/conf/icess/HosseiniY19.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1908-07619,
  author    = {Diaa Badawi and
               Tuba Ayhan and
               Sule Ozev and
               Chengmo Yang and
               Alex Orailoglu and
               A. Enis {\c{C}}etin},
  title     = {Detecting Gas Vapor Leaks Using Uncalibrated Sensors},
  journal   = {CoRR},
  volume    = {abs/1908.07619},
  year      = {2019},
  url       = {http://arxiv.org/abs/1908.07619},
  archivePrefix = {arXiv},
  eprint    = {1908.07619},
  timestamp = {Mon, 26 Aug 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/corr/abs-1908-07619.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/esl/CroninHY18,
  author    = {Patrick Cronin and
               Fateme S. Hosseini and
               Chengmo Yang},
  title     = {A Low Overhead Solution to Resilient Assembly Lines Built From Legacy
               Controllers},
  journal   = {{IEEE} Embed. Syst. Lett.},
  volume    = {10},
  number    = {3},
  pages     = {103--106},
  year      = {2018},
  url       = {https://doi.org/10.1109/LES.2018.2829768},
  doi       = {10.1109/LES.2018.2829768},
  timestamp = {Thu, 10 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/esl/CroninHY18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/MengXY18,
  author    = {Fanruo Meng and
               Yuan Xue and
               Chengmo Yang},
  title     = {Power- and Endurance-Aware Neural Network Training in NVM-Based Platforms},
  journal   = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume    = {37},
  number    = {11},
  pages     = {2709--2719},
  year      = {2018},
  url       = {https://doi.org/10.1109/TCAD.2018.2858360},
  doi       = {10.1109/TCAD.2018.2858360},
  timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tcad/MengXY18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/RozoLZYG18,
  author    = {Laura Rozo and
               Aaron Myles Landwehr and
               Yan Zheng and
               Chengmo Yang and
               Guang Gao},
  title     = {Reliability-Aware Runtime Adaption Through a Statically Generated
               Task Schedule},
  journal   = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume    = {26},
  number    = {1},
  pages     = {11--22},
  year      = {2018},
  url       = {https://doi.org/10.1109/TVLSI.2017.2753242},
  doi       = {10.1109/TVLSI.2017.2753242},
  timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/tvlsi/RozoLZYG18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/ZhangZHYS18,
  author    = {Hongbin Zhang and
               Chao Zhang and
               Qingda Hu and
               Chengmo Yang and
               Jiwu Shu},
  editor    = {Youngsoo Shin},
  title     = {Performance analysis on structure of racetrack memory},
  booktitle = {23rd Asia and South Pacific Design Automation Conference, {ASP-DAC}
               2018, Jeju, Korea (South), January 22-25, 2018},
  pages     = {367--374},
  publisher = {{IEEE}},
  year      = {2018},
  url       = {https://doi.org/10.1109/ASPDAC.2018.8297351},
  doi       = {10.1109/ASPDAC.2018.8297351},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/ZhangZHYS18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/0005ZWDYX18,
  author    = {Fei Wu and
               Jiaona Zhou and
               Shunzhuo Wang and
               Yajuan Du and
               Chengmo Yang and
               Changsheng Xie},
  title     = {FastGC: accelerate garbage collection via an efficient copyback-based
               data migration in SSDs},
  booktitle = {Proceedings of the 55th Annual Design Automation Conference, {DAC}
               2018, San Francisco, CA, USA, June 24-29, 2018},
  pages     = {7:1--7:6},
  publisher = {{ACM}},
  year      = {2018},
  url       = {https://doi.org/10.1145/3195970.3196051},
  doi       = {10.1145/3195970.3196051},
  timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl    = {https://dblp.org/rec/conf/dac/0005ZWDYX18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/CroninYL18,
  author    = {Patrick Cronin and
               Chengmo Yang and
               Yongpan Liu},
  title     = {A collaborative defense against wear out attacks in non-volatile processors},
  booktitle = {Proceedings of the 55th Annual Design Automation Conference, {DAC}
               2018, San Francisco, CA, USA, June 24-29, 2018},
  pages     = {88:1--88:6},
  publisher = {{ACM}},
  year      = {2018},
  url       = {https://doi.org/10.1145/3195970.3196825},
  doi       = {10.1145/3195970.3196825},
  timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/dac/CroninYL18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/host/CroninY18,
  author    = {Patrick Cronin and
               Chengmo Yang},
  title     = {Lowering the barrier to online malware detection through low frequency
               sampling of HPCs},
  booktitle = {2018 {IEEE} International Symposium on Hardware Oriented Security
               and Trust, {HOST} 2018, Washington, DC, USA, April 30 - May 4, 2018},
  pages     = {177--180},
  publisher = {{IEEE} Computer Society},
  year      = {2018},
  url       = {https://doi.org/10.1109/HST.2018.8383910},
  doi       = {10.1109/HST.2018.8383910},
  timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl    = {https://dblp.org/rec/conf/host/CroninY18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/KhouzaniLY18,
  author    = {Hoda Aghaei Khouzani and
               Chen Liu and
               Chengmo Yang},
  editor    = {Iris Bahar},
  title     = {Architecting data placement in SSDs for efficient secure deletion
               implementation},
  booktitle = {Proceedings of the International Conference on Computer-Aided Design,
               {ICCAD} 2018, San Diego, CA, USA, November 05-08, 2018},
  pages     = {42},
  publisher = {{ACM}},
  year      = {2018},
  url       = {https://doi.org/10.1145/3240765.3240780},
  doi       = {10.1145/3240765.3240780},
  timestamp = {Mon, 19 Aug 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/iccad/KhouzaniLY18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isvlsi/CroninYL18,
  author    = {Patrick Cronin and
               Chengmo Yang and
               Yongpan Liu},
  title     = {Reliability and Security in Non-volatile Processors, Two Sides of
               the Same Coin},
  booktitle = {2018 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2018,
               Hong Kong, China, July 8-11, 2018},
  pages     = {112--117},
  publisher = {{IEEE} Computer Society},
  year      = {2018},
  url       = {https://doi.org/10.1109/ISVLSI.2018.00030},
  doi       = {10.1109/ISVLSI.2018.00030},
  timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl    = {https://dblp.org/rec/conf/isvlsi/CroninYL18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isvlsi/ZhangPLYXH18,
  author    = {Xinyi Zhang and
               Clay Patterson and
               Yongpan Liu and
               Chengmo Yang and
               Chun Jason Xue and
               Jingtong Hu},
  title     = {Low Overhead Online Checkpoint for Intermittently Powered Non-volatile
               FPGAs},
  booktitle = {2018 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2018,
               Hong Kong, China, July 8-11, 2018},
  pages     = {238--244},
  publisher = {{IEEE} Computer Society},
  year      = {2018},
  url       = {https://doi.org/10.1109/ISVLSI.2018.00052},
  doi       = {10.1109/ISVLSI.2018.00052},
  timestamp = {Tue, 14 Aug 2018 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/isvlsi/ZhangPLYXH18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/XueY17,
  author    = {Yuan Xue and
               Chengmo Yang},
  title     = {Path reuse-aware routing for non-volatile memory based FPGAs},
  journal   = {Integr.},
  volume    = {58},
  pages     = {505--517},
  year      = {2017},
  url       = {https://doi.org/10.1016/j.vlsi.2016.10.005},
  doi       = {10.1016/j.vlsi.2016.10.005},
  timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/integration/XueY17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/popets/LiuKY17,
  author    = {Chen Liu and
               Hoda Aghaei Khouzani and
               Chengmo Yang},
  title     = {ErasuCrypto: {A} Light-weight Secure Data Deletion Scheme for Solid
               State Drives},
  journal   = {Proc. Priv. Enhancing Technol.},
  volume    = {2017},
  number    = {1},
  pages     = {132--148},
  year      = {2017},
  url       = {https://doi.org/10.1515/popets-2017-0009},
  doi       = {10.1515/popets-2017-0009},
  timestamp = {Tue, 01 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/popets/LiuKY17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/ZhaoXHYLJX17,
  author    = {Mengying Zhao and
               Yuan Xue and
               Jingtong Hu and
               Chengmo Yang and
               Tiantian Liu and
               Zhiping Jia and
               Chun Jason Xue},
  title     = {State Asymmetry Driven State Remapping in Phase Change Memory},
  journal   = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume    = {36},
  number    = {1},
  pages     = {27--40},
  year      = {2017},
  url       = {https://doi.org/10.1109/TCAD.2016.2561408},
  doi       = {10.1109/TCAD.2016.2561408},
  timestamp = {Mon, 29 Mar 2021 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tcad/ZhaoXHYLJX17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/KhouzaniHY17,
  author    = {Hoda Aghaei Khouzani and
               Fateme S. Hosseini and
               Chengmo Yang},
  title     = {Segment and Conflict Aware Page Allocation and Migration in {DRAM-PCM}
               Hybrid Main Memory},
  journal   = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume    = {36},
  number    = {9},
  pages     = {1458--1470},
  year      = {2017},
  url       = {https://doi.org/10.1109/TCAD.2016.2615845},
  doi       = {10.1109/TCAD.2016.2615845},
  timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tcad/KhouzaniHY17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tecs/PanXYCH17,
  author    = {Chen Pan and
               Mimi Xie and
               Chengmo Yang and
               Yiran Chen and
               Jingtong Hu},
  title     = {Exploiting Multiple Write Modes of Nonvolatile Main Memory in Embedded
               Systems},
  journal   = {{ACM} Trans. Embed. Comput. Syst.},
  volume    = {16},
  number    = {4},
  pages     = {110:1--110:26},
  year      = {2017},
  url       = {https://doi.org/10.1145/3063130},
  doi       = {10.1145/3063130},
  timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tecs/PanXYCH17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tecs/KhouzaniY17,
  author    = {Hoda Aghaei Khouzani and
               Chengmo Yang},
  title     = {A DWM-Based Stack Architecture Implementation for Energy Harvesting
               Systems},
  journal   = {{ACM} Trans. Embed. Comput. Syst.},
  volume    = {16},
  number    = {5s},
  pages     = {155:1--155:18},
  year      = {2017},
  url       = {https://doi.org/10.1145/3126543},
  doi       = {10.1145/3126543},
  timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tecs/KhouzaniY17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/NiGCYQ17,
  author    = {Yuanhui Ni and
               Zhiyao Gong and
               Weiwen Chen and
               Chengmo Yang and
               Keni Qiu},
  title     = {State-Transition-Aware Spilling Heuristic for {MLC} STT-RAM-Based
               Registers},
  journal   = {{VLSI} Design},
  volume    = {2017},
  pages     = {1030249:1--1030249:9},
  year      = {2017},
  url       = {https://doi.org/10.1155/2017/1030249},
  doi       = {10.1155/2017/1030249},
  timestamp = {Thu, 16 Aug 2018 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/vlsi/NiGCYQ17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/asianhost/CroninYZQSL17,
  author    = {Patrick Cronin and
               Chengmo Yang and
               Dongqin Zhou and
               Keni Qiu and
               Xin Shi and
               Yongpan Liu},
  title     = {'The danger of sleeping', an exploration of security in non-volatile
               processors},
  booktitle = {2017 Asian Hardware Oriented Security and Trust Symposium, AsianHOST
               2017, Beijing, China, October 19-20, 2017},
  pages     = {121--126},
  publisher = {{IEEE} Computer Society},
  year      = {2017},
  url       = {https://doi.org/10.1109/AsianHOST.2017.8354006},
  doi       = {10.1109/AsianHOST.2017.8354006},
  timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
  biburl    = {https://dblp.org/rec/conf/asianhost/CroninYZQSL17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/XueYH17,
  author    = {Yuan Xue and
               Chengmo Yang and
               Jingtong Hu},
  title     = {Age-aware Logic and Memory Co-Placement for RRAM-FPGAs},
  booktitle = {Proceedings of the 54th Annual Design Automation Conference, {DAC}
               2017, Austin, TX, USA, June 18-22, 2017},
  pages     = {1:1--1:6},
  publisher = {{ACM}},
  year      = {2017},
  url       = {https://doi.org/10.1145/3061639.3062198},
  doi       = {10.1145/3061639.3062198},
  timestamp = {Tue, 06 Nov 2018 16:58:15 +0100},
  biburl    = {https://dblp.org/rec/conf/dac/XueYH17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/HosseiniFYG17,
  author    = {Fateme S. Hosseini and
               Pouya Fotouhi and
               Chengmo Yang and
               Guang R. Gao},
  title     = {Leveraging Compiler Optimizations to Reduce Runtime Fault Recovery
               Overhead},
  booktitle = {Proceedings of the 54th Annual Design Automation Conference, {DAC}
               2017, Austin, TX, USA, June 18-22, 2017},
  pages     = {20:1--20:6},
  publisher = {{ACM}},
  year      = {2017},
  url       = {https://doi.org/10.1145/3061639.3062273},
  doi       = {10.1145/3061639.3062273},
  timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/dac/HosseiniFYG17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/KhouzaniFYG17,
  author    = {Hoda Aghaei Khouzani and
               Pouya Fotouhi and
               Chengmo Yang and
               Guang R. Gao},
  editor    = {David Atienza and
               Giorgio Di Natale},
  title     = {Leveraging access port positions to accelerate page table walk in
               DWM-based main memory},
  booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
               {DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
  pages     = {1450--1455},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {https://doi.org/10.23919/DATE.2017.7927220},
  doi       = {10.23919/DATE.2017.7927220},
  timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/date/KhouzaniFYG17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/ZhangWDYXW17,
  author    = {Meng Zhang and
               Fei Wu and
               Yajuan Du and
               Chengmo Yang and
               Changsheng Xie and
               Jiguang Wan},
  title     = {CooECC: {A} Cooperative Error Correction Scheme to Reduce {LDPC} Decoding
               Latency in {NAND} Flash},
  booktitle = {2017 {IEEE} International Conference on Computer Design, {ICCD} 2017,
               Boston, MA, USA, November 5-8, 2017},
  pages     = {657--664},
  publisher = {{IEEE} Computer Society},
  year      = {2017},
  url       = {https://doi.org/10.1109/ICCD.2017.115},
  doi       = {10.1109/ICCD.2017.115},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/iccd/ZhangWDYXW17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/nvmsa/LiSDDXYZS17,
  author    = {Qiao Li and
               Liang Shi and
               Yejia Di and
               Yajuan Du and
               Chun Jason Xue and
               Chengmo Yang and
               Qingfeng Zhuge and
               Edwin Hsing{-}Mean Sha},
  title     = {Improving read performance via selective Vpass reduction on high density
               3D {NAND} flash memory},
  booktitle = {{IEEE} 6th Non-Volatile Memory Systems and Applications Symposium,
               {NVMSA} 2017, Hsinchu, Taiwan, August 16-18, 2017},
  pages     = {1--4},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {https://doi.org/10.1109/NVMSA.2017.8064482},
  doi       = {10.1109/NVMSA.2017.8064482},
  timestamp = {Wed, 29 Jan 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/nvmsa/LiSDDXYZS17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/XueMY17,
  author    = {Yuan Xue and
               Abraham Mcllvaine and
               Chengmo Yang},
  title     = {Power-aware and cost-efficient state encoding in non-volatile memory
               based FPGAs},
  booktitle = {2017 {IFIP/IEEE} International Conference on Very Large Scale Integration,
               VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017},
  pages     = {1--6},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {https://doi.org/10.1109/VLSI-SoC.2017.8203455},
  doi       = {10.1109/VLSI-SoC.2017.8203455},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsi/XueMY17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jetc/KhouzaniXY16,
  author    = {Hoda Aghaei Khouzani and
               Yuan Xue and
               Chengmo Yang},
  title     = {Fully Exploiting {PCM} Write Capacity Within Near Zero Cost Through
               Segment-Based Page Allocation},
  journal   = {{ACM} J. Emerg. Technol. Comput. Syst.},
  volume    = {12},
  number    = {4},
  pages     = {31:1--31:26},
  year      = {2016},
  url       = {https://doi.org/10.1145/2856423},
  doi       = {10.1145/2856423},
  timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/jetc/KhouzaniXY16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/LiuCY16,
  author    = {Chen Liu and
               Patrick Cronin and
               Chengmo Yang},
  title     = {A mutual auditing framework to protect IoT against hardware Trojans},
  booktitle = {21st Asia and South Pacific Design Automation Conference, {ASP-DAC}
               2016, Macao, Macao, January 25-28, 2016},
  pages     = {69--74},
  publisher = {{IEEE}},
  year      = {2016},
  url       = {https://doi.org/10.1109/ASPDAC.2016.7427991},
  doi       = {10.1109/ASPDAC.2016.7427991},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/LiuCY16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/XueCYH16,
  author    = {Yuan Xue and
               Patrick Cronin and
               Chengmo Yang and
               Jingtong Hu},
  title     = {Routing path reuse maximization for efficient {NV-FPGA} reconfiguration},
  booktitle = {21st Asia and South Pacific Design Automation Conference, {ASP-DAC}
               2016, Macao, Macao, January 25-28, 2016},
  pages     = {360--365},
  publisher = {{IEEE}},
  year      = {2016},
  url       = {https://doi.org/10.1109/ASPDAC.2016.7428038},
  doi       = {10.1109/ASPDAC.2016.7428038},
  timestamp = {Mon, 06 Nov 2017 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/aspdac/XueCYH16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsn/KhouzaniY16,
  author    = {Hoda Aghaei Khouzani and
               Chengmo Yang},
  title     = {Towards a Scalable and Write-Free Multi-version Checkpointing Scheme
               in Solid State Drives},
  booktitle = {46th Annual {IEEE/IFIP} International Conference on Dependable Systems
               and Networks, {DSN} 2016, Toulouse, France, June 28 - July 1, 2016},
  pages     = {37--48},
  publisher = {{IEEE} Computer Society},
  year      = {2016},
  url       = {https://doi.org/10.1109/DSN.2016.13},
  doi       = {10.1109/DSN.2016.13},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/dsn/KhouzaniY16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/XiePHYC15,
  author    = {Mimi Xie and
               Chen Pan and
               Jingtong Hu and
               Chengmo Yang and
               Yiran Chen},
  title     = {Checkpoint-aware instruction scheduling for nonvolatile processor
               with multiple functional units},
  booktitle = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC}
               2015, Chiba, Japan, January 19-22, 2015},
  pages     = {316--321},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/ASPDAC.2015.7059024},
  doi       = {10.1109/ASPDAC.2015.7059024},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/XiePHYC15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/ZhaoXYX15,
  author    = {Mengying Zhao and
               Yuan Xue and
               Chengmo Yang and
               Chun Jason Xue},
  title     = {Minimizing {MLC} {PCM} write energy for free through profiling-based
               state remapping},
  booktitle = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC}
               2015, Chiba, Japan, January 19-22, 2015},
  pages     = {502--507},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/ASPDAC.2015.7059056},
  doi       = {10.1109/ASPDAC.2015.7059056},
  timestamp = {Thu, 01 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/ZhaoXYX15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/KhouzaniYH15,
  author    = {Hoda Aghaei Khouzani and
               Chengmo Yang and
               Jingtong Hu},
  title     = {Improving performance and lifetime of {DRAM-PCM} hybrid main memory
               through a proactive page allocation strategy},
  booktitle = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC}
               2015, Chiba, Japan, January 19-22, 2015},
  pages     = {508--513},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/ASPDAC.2015.7059057},
  doi       = {10.1109/ASPDAC.2015.7059057},
  timestamp = {Sat, 16 Sep 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/KhouzaniYH15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/DuqueY15,
  author    = {Laura A. Rozo Duque and
               Chengmo Yang},
  title     = {Guiding fault-driven adaption in multicore systems through a reliability-aware
               static task schedule},
  booktitle = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC}
               2015, Chiba, Japan, January 19-22, 2015},
  pages     = {612--617},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/ASPDAC.2015.7059076},
  doi       = {10.1109/ASPDAC.2015.7059076},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/DuqueY15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/DuqueDY15,
  author    = {Laura A. Rozo Duque and
               Jose Manuel Monsalve Diaz and
               Chengmo Yang},
  editor    = {Wolfgang Nebel and
               David Atienza},
  title     = {Improving MPSoC reliability through adapting runtime task schedule
               based on time-correlated fault behavior},
  booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe Conference
               {\&} Exhibition, {DATE} 2015, Grenoble, France, March 9-13, 2015},
  pages     = {818--823},
  publisher = {{ACM}},
  year      = {2015},
  url       = {http://dl.acm.org/citation.cfm?id=2755939},
  timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl    = {https://dblp.org/rec/conf/date/DuqueDY15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/emsoft/PanXYSH15,
  author    = {Chen Pan and
               Mimi Xie and
               Chengmo Yang and
               Zili Shao and
               Jingtong Hu},
  editor    = {Alain Girault and
               Nan Guan},
  title     = {Nonvolatile main memory aware garbage collection in high-level language
               virtual machine},
  booktitle = {2015 International Conference on Embedded Software, {EMSOFT} 2015,
               Amsterdam, Netherlands, October 4-9, 2015},
  pages     = {197--206},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/EMSOFT.2015.7318275},
  doi       = {10.1109/EMSOFT.2015.7318275},
  timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl    = {https://dblp.org/rec/conf/emsoft/PanXYSH15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpl/XueCYH15,
  author    = {Yuan Xue and
               Patrick Cronin and
               Chengmo Yang and
               Jingtong Hu},
  title     = {Fine-tuning {CLB} placement to speed up reconfigurations in NVM-based
               FPGAs},
  booktitle = {25th International Conference on Field Programmable Logic and Applications,
               {FPL} 2015, London, United Kingdom, September 2-4, 2015},
  pages     = {1--8},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/FPL.2015.7294013},
  doi       = {10.1109/FPL.2015.7294013},
  timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl    = {https://dblp.org/rec/conf/fpl/XueCYH15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/lctrts/LiuY15,
  author    = {Chen Liu and
               Chengmo Yang},
  editor    = {Sam H. Noh and
               Sebastian Fischmeister and
               Jason Xue},
  title     = {Secure and Durable {(SEDURA):} An Integrated Encryption and Wear-leveling
               Framework for PCM-based Main Memory},
  booktitle = {Proceedings of the 16th {ACM} {SIGPLAN/SIGBED} Conference on Languages,
               Compilers and Tools for Embedded Systems, {LCTES} 2015, CD-ROM, Portland,
               OR, USA, June 18 - 19, 2015},
  pages     = {12:1--12:10},
  publisher = {{ACM}},
  year      = {2015},
  url       = {https://doi.org/10.1145/2670529.2754969},
  doi       = {10.1145/2670529.2754969},
  timestamp = {Wed, 23 Jun 2021 16:58:51 +0200},
  biburl    = {https://dblp.org/rec/conf/lctrts/LiuY15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/YangV15,
  author    = {Chengmo Yang and
               Maria Ruiz Varela},
  title     = {Qualifying non-volatile register files for embedded systems through
               compiler-directed write minimization and balancing},
  booktitle = {2015 {IFIP/IEEE} International Conference on Very Large Scale Integration,
               VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015},
  pages     = {86--91},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/VLSI-SoC.2015.7314397},
  doi       = {10.1109/VLSI-SoC.2015.7314397},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsi/YangV15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/XueCYH15,
  author    = {Yuan Xue and
               Patrick Cronin and
               Chengmo Yang and
               Jingtong Hu},
  title     = {Non-volatile memories in FPGAs: Exploiting logic similarity to accelerate
               reconfiguration and increase programming cycles},
  booktitle = {2015 {IFIP/IEEE} International Conference on Very Large Scale Integration,
               VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015},
  pages     = {92--97},
  publisher = {{IEEE}},
  year      = {2015},
  url       = {https://doi.org/10.1109/VLSI-SoC.2015.7314398},
  doi       = {10.1109/VLSI-SoC.2015.7314398},
  timestamp = {Sat, 16 Sep 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsi/XueCYH15.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tetc/LiuRYK14,
  author    = {Chen Liu and
               Jeyavijayan Rajendran and
               Chengmo Yang and
               Ramesh Karri},
  title     = {Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security-
               Driven Task Scheduling},
  journal   = {{IEEE} Trans. Emerg. Top. Comput.},
  volume    = {2},
  number    = {4},
  pages     = {461--472},
  year      = {2014},
  url       = {https://doi.org/10.1109/TETC.2014.2348182},
  doi       = {10.1109/TETC.2014.2348182},
  timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tetc/LiuRYK14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/ShiLLXYZ14,
  author    = {Liang Shi and
               Jianhua Li and
               Qing'an Li and
               Chun Jason Xue and
               Chengmo Yang and
               Xuehai Zhou},
  title     = {A Unified Write Buffer Cache Management Scheme for Flash Memory},
  journal   = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume    = {22},
  number    = {12},
  pages     = {2779--2792},
  year      = {2014},
  url       = {https://doi.org/10.1109/TVLSI.2013.2294462},
  doi       = {10.1109/TVLSI.2013.2294462},
  timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/tvlsi/ShiLLXYZ14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/codes/LiuYS14,
  author    = {Chen Liu and
               Chengmo Yang and
               Yuanqi Shen},
  editor    = {Radu Marculescu and
               Gabriela Nicolescu},
  title     = {Leveraging microarchitectural side channel information to efficiently
               enhance program control flow integrity},
  booktitle = {2014 International Conference on Hardware/Software Codesign and System
               Synthesis, {CODES+ISSS} 2014, Uttar Pradesh, India, October 12-17,
               2014},
  pages     = {5:1--5:9},
  publisher = {{ACM}},
  year      = {2014},
  url       = {https://doi.org/10.1145/2656075.2656092},
  doi       = {10.1145/2656075.2656092},
  timestamp = {Wed, 16 Oct 2019 14:14:48 +0200},
  biburl    = {https://dblp.org/rec/conf/codes/LiuYS14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/codes/PanXHCY14,
  author    = {Chen Pan and
               Mimi Xie and
               Jingtong Hu and
               Yiran Chen and
               Chengmo Yang},
  editor    = {Radu Marculescu and
               Gabriela Nicolescu},
  title     = {3M-PCM: Exploiting multiple write modes {MLC} phase change main memory
               in embedded systems},
  booktitle = {2014 International Conference on Hardware/Software Codesign and System
               Synthesis, {CODES+ISSS} 2014, Uttar Pradesh, India, October 12-17,
               2014},
  pages     = {33:1--33:10},
  publisher = {{ACM}},
  year      = {2014},
  url       = {https://doi.org/10.1145/2656075.2656076},
  doi       = {10.1145/2656075.2656076},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/codes/PanXHCY14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/LiuY14,
  author    = {Chen Liu and
               Chengmo Yang},
  editor    = {Joseph R. Cavallaro and
               Tong Zhang and
               Alex K. Jones and
               Hai (Helen) Li},
  title     = {Exploiting heterogeneity in MPSoCs to prevent potential trojan propagation
               across malicious IPs},
  booktitle = {Great Lakes Symposium on {VLSI} 2014, {GLSVLSI} '14, Houston, TX,
               {USA} - May 21 - 23, 2014},
  pages     = {335--340},
  publisher = {{ACM}},
  year      = {2014},
  url       = {https://doi.org/10.1145/2591513.2591595},
  doi       = {10.1145/2591513.2591595},
  timestamp = {Mon, 19 Aug 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/glvlsi/LiuY14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/ZhaoSYX14,
  author    = {Mengying Zhao and
               Liang Shi and
               Chengmo Yang and
               Chun Jason Xue},
  title     = {Leveling to the last mile: Near-zero-cost bit level wear leveling
               for PCM-based main memory},
  booktitle = {32nd {IEEE} International Conference on Computer Design, {ICCD} 2014,
               Seoul, South Korea, October 19-22, 2014},
  pages     = {16--21},
  publisher = {{IEEE} Computer Society},
  year      = {2014},
  url       = {https://doi.org/10.1109/ICCD.2014.6974656},
  doi       = {10.1109/ICCD.2014.6974656},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/iccd/ZhaoSYX14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/LiuY14,
  author    = {Chen Liu and
               Chengmo Yang},
  title     = {Improving multilevel {PCM} reliability through age-aware reading and
               writing strategies},
  booktitle = {32nd {IEEE} International Conference on Computer Design, {ICCD} 2014,
               Seoul, South Korea, October 19-22, 2014},
  pages     = {264--269},
  publisher = {{IEEE} Computer Society},
  year      = {2014},
  url       = {https://doi.org/10.1109/ICCD.2014.6974691},
  doi       = {10.1109/ICCD.2014.6974691},
  timestamp = {Mon, 19 Aug 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/iccd/LiuY14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/islped/KhouzaniXYP14,
  author    = {Hoda Aghaei Khouzani and
               Yuan Xue and
               Chengmo Yang and
               Archana Pandurangi},
  editor    = {Yuan Xie and
               Tanay Karnik and
               Muhammad M. Khellah and
               Renu Mehra},
  title     = {Prolonging {PCM} lifetime through energy-efficient, segment-aware,
               and wear-resistant page allocation},
  booktitle = {International Symposium on Low Power Electronics and Design, ISLPED'14,
               La Jolla, CA, {USA} - August 11 - 13, 2014},
  pages     = {327--330},
  publisher = {{ACM}},
  year      = {2014},
  url       = {https://doi.org/10.1145/2627369.2627667},
  doi       = {10.1145/2627369.2627667},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/islped/KhouzaniXYP14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cases/ChenY13,
  author    = {Hao Chen and
               Chengmo Yang},
  title     = {Fault detection and recovery efficiency co-optimization through compile-time
               analysis and runtime adaptation},
  booktitle = {International Conference on Compilers, Architecture and Synthesis
               for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
               29 - October 4, 2013},
  pages     = {22:1--22:10},
  publisher = {{IEEE}},
  year      = {2013},
  url       = {https://doi.org/10.1109/CASES.2013.6662528},
  doi       = {10.1109/CASES.2013.6662528},
  timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
  biburl    = {https://dblp.org/rec/conf/cases/ChenY13.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dft/LiuRYK13,
  author    = {Chen Liu and
               Jeyavijayan Rajendran and
               Chengmo Yang and
               Ramesh Karri},
  title     = {Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security-driven
               task scheduling},
  booktitle = {2013 {IEEE} International Symposium on Defect and Fault Tolerance
               in {VLSI} and Nanotechnology Systems, {DFTS} 2013, New York City,
               NY, USA, October 2-4, 2013},
  pages     = {101--106},
  publisher = {{IEEE} Computer Society},
  year      = {2013},
  url       = {https://doi.org/10.1109/DFT.2013.6653590},
  doi       = {10.1109/DFT.2013.6653590},
  timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/dft/LiuRYK13.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/lctrts/ChenY13,
  author    = {Hao Chen and
               Chengmo Yang},
  editor    = {Bj{\"{o}}rn Franke and
               Jingling Xue},
  title     = {Boosting efficiency of fault detection and recovery throughapplication-specific
               comparison and checkpointing},
  booktitle = {{SIGPLAN/SIGBED} Conference on Languages, Compilers and Tools for
               Embedded Systems 2013, {LCTES} '13, Seattle, WA, USA, June 20-21,
               2013},
  pages     = {13--20},
  publisher = {{ACM}},
  year      = {2013},
  url       = {https://doi.org/10.1145/2491899.2465562},
  doi       = {10.1145/2491899.2465562},
  timestamp = {Thu, 24 Jun 2021 16:19:30 +0200},
  biburl    = {https://dblp.org/rec/conf/lctrts/ChenY13.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/YangO12,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  title     = {Tackling Resource Variations Through Adaptive Multicore Execution
               Frameworks},
  journal   = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume    = {31},
  number    = {1},
  pages     = {132--145},
  year      = {2012},
  url       = {https://doi.org/10.1109/TCAD.2011.2166829},
  doi       = {10.1109/TCAD.2011.2166829},
  timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/tcad/YangO12.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/WangLSY12,
  author    = {Tianzheng Wang and
               Duo Liu and
               Zili Shao and
               Chengmo Yang},
  title     = {Write-activity-aware page table management for PCM-based embedded
               systems},
  booktitle = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
               {ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
  pages     = {317--322},
  publisher = {{IEEE}},
  year      = {2012},
  url       = {https://doi.org/10.1109/ASPDAC.2012.6164966},
  doi       = {10.1109/ASPDAC.2012.6164966},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/aspdac/WangLSY12.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/computer/RaoYKO11,
  author    = {Wenjing Rao and
               Chengmo Yang and
               Ramesh Karri and
               Alex Orailoglu},
  title     = {Toward Future Systems with Nanoscale Devices: Overcoming the Reliability
               Challenge},
  journal   = {Computer},
  volume    = {44},
  number    = {2},
  pages     = {46--53},
  year      = {2011},
  url       = {https://doi.org/10.1109/MC.2011.1},
  doi       = {10.1109/MC.2011.1},
  timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/computer/RaoYKO11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jpdc/ZhangXYO11,
  author    = {Yuping Zhang and
               Chun Jason Xue and
               Chengmo Yang and
               Alex Orailoglu},
  title     = {Migration-aware adaptive MPSoC static schedules with dynamic reconfigurability},
  journal   = {J. Parallel Distributed Comput.},
  volume    = {71},
  number    = {10},
  pages     = {1400--1410},
  year      = {2011},
  url       = {https://doi.org/10.1016/j.jpdc.2011.06.006},
  doi       = {10.1016/j.jpdc.2011.06.006},
  timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/jpdc/ZhangXYO11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/YangO11,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  title     = {Full Fault Resilience and Relaxed Synchronization Requirements at
               the Cache-Memory Interface},
  journal   = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume    = {19},
  number    = {11},
  pages     = {1996--2009},
  year      = {2011},
  url       = {https://doi.org/10.1109/TVLSI.2010.2067230},
  doi       = {10.1109/TVLSI.2010.2067230},
  timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/tvlsi/YangO11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/YangO11,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  title     = {Frugal but flexible multicore topologies in support of resource variation-driven
               adaptivity},
  booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
               March 14-18, 2011},
  pages     = {1255--1260},
  publisher = {{IEEE}},
  year      = {2011},
  url       = {https://doi.org/10.1109/DATE.2011.5763201},
  doi       = {10.1109/DATE.2011.5763201},
  timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl    = {https://dblp.org/rec/conf/date/YangO11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/emsoft/ShiLXYZ11,
  author    = {Liang Shi and
               Jianhua Li and
               Chun Jason Xue and
               Chengmo Yang and
               Xuehai Zhou},
  editor    = {Samarjit Chakraborty and
               Ahmed Jerraya and
               Sanjoy K. Baruah and
               Sebastian Fischmeister},
  title     = {ExLRU: a unified write buffer cache management for flash memory},
  booktitle = {Proceedings of the 11th International Conference on Embedded Software,
               {EMSOFT} 2011, part of the Seventh Embedded Systems Week, ESWeek 2011,
               Taipei, Taiwan, October 9-14, 2011},
  pages     = {339--348},
  publisher = {{ACM}},
  year      = {2011},
  url       = {https://doi.org/10.1145/2038642.2038694},
  doi       = {10.1145/2038642.2038694},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/emsoft/ShiLXYZ11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/estimedia/LiSXYX11,
  author    = {Jianhua Li and
               Liang Shi and
               Chun Jason Xue and
               Chengmo Yang and
               Yinlong Xu},
  title     = {Exploiting set-level write non-uniformity for energy-efficient NVM-based
               hybrid cache},
  booktitle = {9th {IEEE} Symposium on Embedded Systems for Real-Time Multimedia,
               ESTIMedia 2011, Taipei, Taiwan, October 13-14, 2011},
  pages     = {19--28},
  publisher = {{IEEE} Computer Society},
  year      = {2011},
  url       = {https://doi.org/10.1109/ESTIMedia.2011.6088521},
  doi       = {10.1109/ESTIMedia.2011.6088521},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/estimedia/LiSXYX11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@phdthesis{DBLP:phd/basesearch/Yang10b,
  author    = {Chengmo Yang},
  title     = {Tackling computation uncertainty through fine-grained and predictable
               execution adaptivity in multicore systems},
  school    = {University of California, San Diego, {USA}},
  year      = {2010},
  url       = {http://www.escholarship.org/uc/item/22w4j8gt},
  timestamp = {Wed, 12 Apr 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/phd/basesearch/Yang10b.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/dafes/YangCO10,
  author    = {Chengmo Yang and
               Mingjing Chen and
               Alex Orailoglu},
  title     = {Squashing code size in microcoded IPs while delivering high decompression
               speed},
  journal   = {Des. Autom. Embed. Syst.},
  volume    = {14},
  number    = {3},
  pages     = {265--284},
  year      = {2010},
  url       = {https://doi.org/10.1007/s10617-010-9057-z},
  doi       = {10.1007/s10617-010-9057-z},
  timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/dafes/YangCO10.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/YangO10,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  title     = {Fully adaptive multicore architectures through statically-directed
               dynamic execution reconfigurations},
  booktitle = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
               Conference on Very Large Scale Integration of System-on-Chip, Madrid,
               Spain, 27-29 September 2010},
  pages     = {396--401},
  publisher = {{IEEE}},
  year      = {2010},
  url       = {https://doi.org/10.1109/VLSISOC.2010.5642694},
  doi       = {10.1109/VLSISOC.2010.5642694},
  timestamp = {Wed, 24 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsi/YangO10.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/YangXO10,
  author    = {Chengmo Yang and
               Chun Jason Xue and
               Alex Orailoglu},
  title     = {Fine-grained adaptive {CMP} cache sharing through access history exploitation},
  booktitle = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
               Conference on Very Large Scale Integration of System-on-Chip, Madrid,
               Spain, 27-29 September 2010},
  pages     = {420--425},
  publisher = {{IEEE}},
  year      = {2010},
  url       = {https://doi.org/10.1109/VLSISOC.2010.5642698},
  doi       = {10.1109/VLSISOC.2010.5642698},
  timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsi/YangXO10.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/codes/YangCO09,
  author    = {Chengmo Yang and
               Mingjing Chen and
               Alex Orailoglu},
  editor    = {Wolfgang Rosenstiel and
               Kazutoshi Wakabayashi},
  title     = {Squashing microcode stores to size in embedded systems while delivering
               rapid microcode accesses},
  booktitle = {Proceedings of the 7th International Conference on Hardware/Software
               Codesign and System Synthesis, {CODES+ISSS} 2009, Grenoble, France,
               October 11-16, 2009},
  pages     = {249--256},
  publisher = {{ACM}},
  year      = {2009},
  url       = {https://doi.org/10.1145/1629435.1629471},
  doi       = {10.1145/1629435.1629471},
  timestamp = {Mon, 26 Nov 2018 12:14:45 +0100},
  biburl    = {https://dblp.org/rec/conf/codes/YangCO09.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/YangO09,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  editor    = {Luca Benini and
               Giovanni De Micheli and
               Bashir M. Al{-}Hashimi and
               Wolfgang M{\"{u}}ller},
  title     = {Towards no-cost adaptive MPSoC static schedules through exploitation
               of logical-to-physical core mapping latitude},
  booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
               April 20-24, 2009},
  pages     = {63--68},
  publisher = {{IEEE}},
  year      = {2009},
  url       = {https://doi.org/10.1109/DATE.2009.5090634},
  doi       = {10.1109/DATE.2009.5090634},
  timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl    = {https://dblp.org/rec/conf/date/YangO09.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsn/YangO09,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  title     = {Processor reliability enhancement through compiler-directed register
               file peak temperature reduction},
  booktitle = {Proceedings of the 2009 {IEEE/IFIP} International Conference on Dependable
               Systems and Networks, {DSN} 2009, Estoril, Lisbon, Portugal, June
               29 - July 2, 2009},
  pages     = {468--477},
  publisher = {{IEEE} Computer Society},
  year      = {2009},
  url       = {https://doi.org/10.1109/DSN.2009.5270305},
  doi       = {10.1109/DSN.2009.5270305},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/dsn/YangO09.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cases/YangO08,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  editor    = {Erik R. Altman},
  title     = {A light-weight cache-based fault detection and checkpointing scheme
               for MPSoCs enabling relaxed execution synchronization},
  booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
               and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
               October 19-24, 2008},
  pages     = {11--20},
  publisher = {{ACM}},
  year      = {2008},
  url       = {https://doi.org/10.1145/1450095.1450100},
  doi       = {10.1145/1450095.1450100},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/cases/YangO08.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cases/YangO07,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  editor    = {Taewhan Kim and
               Pascal Sainrat and
               Steven S. Lumetta and
               Nacho Navarro},
  title     = {Light-weight synchronization for inter-processor communication acceleration
               on embedded MPSoCs},
  booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
               and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
               September 30 - October 3, 2007},
  pages     = {150--154},
  publisher = {{ACM}},
  year      = {2007},
  url       = {https://doi.org/10.1145/1289881.1289909},
  doi       = {10.1145/1289881.1289909},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/cases/YangO07.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/codes/YangO07,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  editor    = {Soonhoi Ha and
               Kiyoung Choi and
               Nikil D. Dutt and
               J{\"{u}}rgen Teich},
  title     = {Predictable execution adaptivity through embedding dynamic reconfigurability
               into static MPSoC schedules},
  booktitle = {Proceedings of the 5th International Conference on Hardware/Software
               Codesign and System Synthesis, {CODES+ISSS} 2007, Salzburg, Austria,
               September 30 - October 3, 2007},
  pages     = {15--20},
  publisher = {{ACM}},
  year      = {2007},
  url       = {https://doi.org/10.1145/1289816.1289824},
  doi       = {10.1145/1289816.1289824},
  timestamp = {Sat, 05 Sep 2020 18:08:48 +0200},
  biburl    = {https://dblp.org/rec/conf/codes/YangO07.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/IEEEpact/YangO06,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  editor    = {Erik R. Altman and
               Kevin Skadron and
               Benjamin G. Zorn},
  title     = {Power-efficient instruction delivery through trace reuse},
  booktitle = {15th International Conference on Parallel Architectures and Compilation
               Techniques {(PACT} 2006), Seattle, Washington, USA, September 16-20,
               2006},
  pages     = {192--201},
  publisher = {{ACM}},
  year      = {2006},
  url       = {https://doi.org/10.1145/1152154.1152185},
  doi       = {10.1145/1152154.1152185},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/IEEEpact/YangO06.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cases/YangO06,
  author    = {Chengmo Yang and
               Alex Orailoglu},
  editor    = {Seongsoo Hong and
               Wayne H. Wolf and
               Kriszti{\'{a}}n Flautner and
               Taewhan Kim},
  title     = {Power efficient branch prediction through early identification of
               branch addresses},
  booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
               and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
               22-25, 2006},
  pages     = {169--178},
  publisher = {{ACM}},
  year      = {2006},
  url       = {https://doi.org/10.1145/1176760.1176782},
  doi       = {10.1145/1176760.1176782},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/cases/YangO06.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}